JTAG-HS1¶

The JTAG-HS1 programming cable is a high-speed programming solution for Xilinx® FPGAs. Official reference can be found here.

Contents

Configuration ¶

[env:myenv]
platform = ...
board = ...
debug_tool = digilent-hs1

If you would like to use this tool for firmware uploading, please change upload protocol:

[env:myenv]
platform = ...
board = ...
debug_tool = digilent-hs1
upload_protocol = digilent-hs1

More options:

Name	Description
CHIPS Alliance	The CHIPS Alliance develops high-quality, open source hardware designs relevant to silicon devices and FPGAs.
OpenHW Group	OpenHW Group is a not-for-profit, global organization that provides an infrastructure for hosting high quality open-source HW developments in line with industry best practices. The OpenHW CV32E40P RISC-V core is the first open-source core for high-volume chips verified with the state-of-the-art process required for high-integrity, commercial SoCs.

Name	Description
FreeRTOS	FreeRTOS is a real-time operating system kernel for embedded devices that has been ported to 40 microcontroller platforms
PULP Runtime Environment	Runtime Environment for Parallel Ultra Low Power platform targeting high energy efficiencies
PULP SDK	Software Development Kit for Parallel Ultra Low Power platform targeting high energy efficiencies
WD-Firmware	The WD Firmware package contains firmware applications and Processor Support Package (PSP) for various cores, alongside demos which support all features

Note

For more detailed board information please scroll tables below by horizontal.

Name	Platform	Debug	MCU	Frequency	Flash	RAM
Digilent Nexys A7	OpenHW Group	On-board		320MHz	16MB	1.16MB
RVfpga: Digilent Nexys A7	CHIPS Alliance	On-board		320MHz	16MB	1.16MB